A more efficient residue arithmetic implementation of the FFT

After 20 years, the FFT remains restricted in its real time capabilities. To overcome this throughput obstacle, fast residue arithmetic units are studied based on several recent innovations in the field of complex finite rings. A dedicated machine is designed which makes use of these new results and is compared to conventional FFT designs. Using high speed semiconductor memory to implement the required residue arithmetic mappings, speed and complexity metrics of a basic FFT unit are shown to be improved. However, the derived architecture and arithmetic introduce a new and challenging set of magnitude scaling problems. They are resolved with the result being an integrated residue arithmetic FFT system capable of supporting very high real time data rates.