DocumentCode
3402011
Title
Binary paradigm and systolic array implementation for residue arithmetic
Author
Yun, David Y Y ; Zhang, Chang N.
Author_Institution
Department of Computer Science and Engineering Southern Methodist University Dallas, Texas 75275
fYear
1985
fDate
4-6 June 1985
Firstpage
189
Lastpage
193
Abstract
The problem of residue, or modular, arithmetic is fundamental to symbolic and algebraic computation, coding theory and applications, as well as to error-free arithmetic computations. This paper describes novel algorithms that can lead to efficient hardware for arithmetic operations in residue domains. One of the main achievements is in allowing the flexibility of changing moduli. The technology of systolic array has been used to implement one of the most representative operations, the modular multipler. It is shown that a linear systolic array can compute N modular products in time O(N) with constant number of cells.
Keywords
Algorithm design and analysis; Arrays; Computational efficiency; Hardware; Software algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1985 IEEE 7th Symposium on
Conference_Location
Urbana, IL,
Type
conf
DOI
10.1109/ARITH.1985.6158978
Filename
6158978
Link To Document