DocumentCode :
3402020
Title :
Analysis of cross-talk effects on logic cell delays in CMOS integrated circuits
Author :
Moll, Francesc ; Isern, Eugeni ; Sicard, Etienne ; Rubio, Antonio
Author_Institution :
Dept. of Phys., Univ. of Balearic Islands, Spain
fYear :
1991
fDate :
14-17 May 1991
Firstpage :
387
Abstract :
Shows how crosstalk coupling between signals with concurrent transitions can cause a significant increase in or a reduction of the propagation delay of CMOS logic cells connected to them. A reduced model for parasitic capacitive coupling is proposed, and the influence of electrical cell parameters on the internal delay is evaluated. As an application example, the authors analyze how an enlarged delay due to crosstalk can cause permanent logic faults in RS latch circuits
Keywords :
CMOS integrated circuits; crosstalk; delays; flip-flops; integrated logic circuits; logic gates; CMOS integrated circuits; CMOS logic cells; RS latch circuits; concurrent transitions; cross-talk effects; crosstalk coupling; electrical cell parameters; internal delay; logic cell delays; parasitic capacitive coupling; permanent logic faults; propagation delay; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Capacitors; Circuit faults; Coupling circuits; Delay effects; Impedance; Parasitic capacitance; Propagation delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-0620-1
Type :
conf
DOI :
10.1109/MWSCAS.1991.252178
Filename :
252178
Link To Document :
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