A front-end electronics module for the PHENIX pad chamber

Author

Smith, M.C. ; Bryan, W.L. ; Smith, D. ; Jagadish, U. ; McMillan, D. ; Walker, J. ; Young, G.R. ; Oskarsson, A. ; Osterman, L. ; Greene, V. ; Nikkinen, L.

Author_Institution

Oak Ridge Nat. Lab., TN, USA

Volume

2

fYear

1998

fDate

1998

Firstpage

910

Abstract

A front-end electronics module (FEM) has been developed for the PHENIX Pad Chamber. The module´s control functions are performed by the heap manager unit, an FPGA-based circuit on the FEM. Each FEM processes 2160 channels of front-end electronics (FEE). Data readout and formatting are performed by an additional FPGA-based circuit on the FEM. Three external systems provide initialization, timing, and data information via serial interfaces. This paper discusses the application of the heap manager, data formatter, and serial interfaces to meet the specific control and data readout needs of the Pad Chamber Subsystem. Unit functions, interfaces, timing, data format, and communication rates are discussed. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling and FPGA implementation and programming are presented

Keywords

field programmable gate arrays; nuclear electronics; readout electronics; semiconductor counters; FPGA-based circuit; PHENIX pad chamber; communication rates; data formatter; data formatting; data information; data readout; error handling; front-end electronics module; heap manager unit; initialization; interfaces; mode control; serial architecture; serial interfaces; timing; unit functions; Atherosclerosis; Circuits; Clocks; Communication system control; Control systems; Detectors; Field programmable gate arrays; Government; Laboratories; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium, 1998. Conference Record. 1998 IEEE

Conference_Location

Toronto, Ont.

ISSN

1082-3654

Print_ISBN

0-7803-5021-9

Type

conf

DOI

10.1109/NSSMIC.1998.774316

Filename

774316