An FDC-based auto-calibration technique for ΔΣ fractional-N PLL

Auto-calibration of VCO frequency and loop gain is an essential process in PLL frequency synthesizers before the closed-loop locking process begins. It is crucial for the lock time and phase noise performances especially in a wide tuning-range fractional-N PLL frequency synthesizer. This paper reviews the design issues and limitations of the previous auto-calibration techniques. And a very simple and efficient auto-calibration method by using a high-speed frequency-to-digital converter (FDC) is proposed. It is highly suited for a ΔΣ fractional-N PLL, and provides a fast and accurate calibration of the VCO frequency and loop bandwidth over an octave tuning range.