DocumentCode
3403327
Title
On a prefetching heterogeneous MDD machine
Author
Nakahara, H. ; Sasao, T. ; Matsuura, Motoharu
Author_Institution
Kyushu Inst. of Technol., Fukuoka, Japan
fYear
2011
fDate
7-10 Aug. 2011
Firstpage
1
Lastpage
4
Abstract
This paper considers a heterogeneous multi-valued decision diagram machine (HMDDM). First, we introduce a standard heterogeneous multi-valued decision diagram machine (standard HMDDM). Then, we show a method to prefetch index for the HMDDM (prefetching HMDDM). The standard HMDDM requires two memory references to read the jump address and the index separately, while the prefetching HMDDM requires only one memory reference to them at a time. Thus, the prefetching HMDDM is twice faster than the standard HMDDM. We implemented the prefetching HMDDM on an FPGA. Also, we compared with Intel´s Core2Duo (1.2 GHz). As for the execution time, the prefetching HMDDM is 14.53-18.97 times faster than the Core2Duo. Since the HMDDM consists of the small FPGA and the off-chip RAM, the power consumption for the HMDDM is smaller than that for the conventional CPU. Thus, the HMDDM is the power-performance efficient processor.
Keywords
decision diagrams; field programmable gate arrays; microprocessor chips; random-access storage; FPGA; Intel Core2Duo; heterogeneous MDD machine; heterogeneous multivalued decision diagram machine; off-chip RAM; prefetching HMDDM; standard HMDDM; Boolean functions; Data structures; Delta modulation; Field programmable gate arrays; Prefetching;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location
Seoul
ISSN
1548-3746
Print_ISBN
978-1-61284-856-3
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2011.6026352
Filename
6026352
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