• DocumentCode
    3403342
  • Title

    Multiple terminal reduction method

  • Author

    Suzuki, Goro

  • Author_Institution
    Univ. of Kitakyushu, Kitakyushu, Japan
  • fYear
    2013
  • fDate
    4-6 Sept. 2013
  • Firstpage
    147
  • Lastpage
    152
  • Abstract
    We proposed a novel terminal reduction method that can cope with substrate noise analysis. The key point of our idea uses the some properties of positive matrix whose entries are all positive. We gave proof of these properties. We can reduce multiple input terminal numbers into very small number, therefore Model Order Reduction can work very well. We evaluated our terminal reduction method using substrate noise analysis. Our proposed method can realize high accuracy and high speed in multiple terminals signal integrity analysis.
  • Keywords
    VLSI; integrated circuit noise; network analysis; substrates; VLSI circuit simulators; model order reduction; multiple-input terminal number reduction; multiple-terminal signal integrity analysis; substrate noise analysis; Eigenvalues and eigenfunctions; Integrated circuit modeling; Matrix decomposition; Noise; Resistors; Substrates; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2013 IEEE 26th International
  • Conference_Location
    Erlangen
  • ISSN
    2164-1676
  • Type

    conf

  • DOI
    10.1109/SOCC.2013.6749679
  • Filename
    6749679