DocumentCode
3403848
Title
Adaptive performance compensation with on-chip variation monitoring
Author
Hashimoto, Mime ; Fuketa, Hiroshi
Author_Institution
Dept. of Inf. Syst. Eng., Osaka Univ., Suita, Japan
fYear
2011
fDate
7-10 Aug. 2011
Firstpage
1
Lastpage
4
Abstract
This paper discusses adaptive performance control with two types of on-chip variation sensors. The first sensor aims to extract several device-parameters for performance adaptation from a set of on-chip ring-oscillators with different sensitivities to device-parameters, and the device-parameter decomposition is discussed. The second sensors, which are embedded into functional circuits, predict timing errors due to PVT variations and aging. By controlling circuit performance according to the sensor outputs, PVT worst-case design can be overcome and power dissipation can be reduced while satisfying performance requirements. Measurement results of a subthreshold adder on 65-nm test chips show that the adaptive speed control can compensate PVT variations and improve energy efficiency by up to 46% compared to the worst-case design and operation with guardbanding.
Keywords
adaptive control; adders; electric sensing devices; error compensation; microprocessor chips; oscillators; timing circuits; velocity control; PVT variations; adaptive performance compensation; adaptive performance control; adaptive speed control; aging; device-parameter decomposition; functional circuits; on-chip ring-oscillators; on-chip variation monitoring; on-chip variation sensors; power dissipation; size 65 nm; subthreshold adder; timing errors; Monitoring; Performance evaluation; Semiconductor device measurement; Sensors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location
Seoul
ISSN
1548-3746
Print_ISBN
978-1-61284-856-3
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2011.6026381
Filename
6026381
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