DocumentCode :
3404636
Title :
2.4 GHz divide-by-256∼271 single-ended frequency divider in standard 0.35-μm CMOS technology
Author :
Tseng, Sheng-Che ; Meng, Chinchun ; Li, Shao-Yu ; Su, Jen-Yi ; Huang, Guo-Wei
Author_Institution :
Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
2
fYear :
2005
fDate :
4-7 Dec. 2005
Abstract :
This paper demonstrates a low-cost 2.4 GHz single-ended frequency divider with the divide-by-value from 256 to 271 in standard 0.35-μm 2P4M CMOS technology. This frequency divider is composed of a synchronous CML divide-by-4/5 prescaler, an asynchronous TSPC TFF divide-by-64 divider and digital control circuitry. This proposed divider is single-ended and compatible to the single-ended low-phase-noise Colpitts VCO. The operating frequency range of the divider is from 400 MHz to 2.9 GHz. Most of input sensitivity levels are about -10 dBm and the lowest level is -25 dBm at 2.4 GHz. Its core power consumption is about 28 mW. The chip size is 1.2×0.7 mm2.
Keywords :
CMOS logic circuits; UHF frequency convertors; current-mode logic; frequency dividers; low-power electronics; phase noise; prescalers; voltage-controlled oscillators; 0.35 micron; 0.4 to 2.9 GHz; 2.8 mW; CMOS technology; Colpitts voltage controlled oscillator; current mode logic; digital control circuitry; frequency divider; single-ended low-phase-noise VCO; synchronous CML divide-by-4/5 prescaler; CMOS logic circuits; CMOS technology; Costs; Counting circuits; Digital control; Energy consumption; Frequency conversion; Phase locked loops; Radiofrequency integrated circuits; Voltage-controlled oscillators; CMOS; Current Mode; Divide-by-4/5; Logic; Prescaler; Single-Ended;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN :
0-7803-9433-X
Type :
conf
DOI :
10.1109/APMC.2005.1606402
Filename :
1606402
Link To Document :
بازگشت