Title :
A new low power test pattern generator based on two-bit twisted ring counter
Author :
Zhou, Bin ; Wu, Qun ; Xiao, Li-yi ; Wu, Xin-chun ; Cao, Bei
Author_Institution :
Dept. of Electr. & Commun. Eng., Harbin Inst. of Technol., Harbin, China
Abstract :
A new single input change (SIC) test pattern generator (TPG), called multi two-bit twisted ring counters (MTB-TRC), is presented in this paper. Experimental results based on ISCAS´85 benchmark circuits show that the proposed MTB-TRC has the improved performance (power, fault coverage and test length), compared with the corresponding already known TPGs. Another advantage of the proposed MTB-TRC is that the same TPG can be used for testing more than one module in a SOC.
Keywords :
automatic test pattern generation; logic testing; low-power electronics; MTB-TRC; SIC test pattern generator; fault coverage; low power test pattern generator; multi two-bit twisted ring counter; single input change TPG; Built-in self-test; Circuit faults; Clocks; Radiation detectors; Silicon carbide; Test pattern generators; LFSR; Low Testing Power; Two-bit Twisted Ring Counter;
Conference_Titel :
Optoelectronics and Microelectronics Technology (AISOMT), 2011 Academic International Symposium on
Conference_Location :
Harbin
Print_ISBN :
978-1-4577-0794-0
DOI :
10.1109/AISMOT.2011.6159385
