The design of dual-band CMOS low noise amplifier for wireless applications

Author

Zhiqiang, Gao ; Dawei, Liu ; Xiaowei, Liu ; Zhongzhao, Zhang

Author_Institution

Dept. of Microelectron., Harbin Inst. of Technol., Harbin, China

fYear

2011

fDate

12-16 Oct. 2011

Firstpage

344

Lastpage

347

Abstract

In this paper, a concurrent dual-band design of low noise amplifier, which could work with 3G-Exband 2.6GHz and WLAN 5.2GHz bands is presented using 0.18μm CMOS technology. The topology of the inductance degenerated cascode structure based on power-constrained simultaneous noise and input matching (PCSNIM) technique is presented. The simulated results of the circuit show that the optimized Noise Figure is about 0.65dB and 0.78dB, the input return loss S11 is about -20dB and -22dB, and power gain S21 is about 15dB and 9.5dB at the bands of 2.6GHz and 5.2GHz, respectively. The circuit dissipation of DC power is only 3.6mW under a supply 1.8V.

Keywords

CMOS analogue integrated circuits; UHF amplifiers; low noise amplifiers; microwave amplifiers; 3G-Exband band; DC power circuit dissipation; PCSNIM technique; WLAN band; concurrent dual-band CMOS low noise amplifier; frequency 2.6 GHz; frequency 5.2 GHz; inductance degenerated cascode structure topology; input return loss; noise figure optimization; power 3.6 mW; power-constrained simultaneous noise and input matching technique; size 0.18 mum; voltage 1.8 V; wireless application; CMOS integrated circuits; Dual band; Impedance matching; Noise; Noise figure; Resonant frequency; Simulation; Dual-band concurrent LNA; Matching; Noise Figure; PCSNIM;

fLanguage

English

Publisher

ieee

Conference_Titel

Optoelectronics and Microelectronics Technology (AISOMT), 2011 Academic International Symposium on

Conference_Location

Harbin

Print_ISBN

978-1-4577-0794-0

Type

conf

DOI

10.1109/AISMOT.2011.6159388

Filename

6159388