DocumentCode :
3405222
Title :
Noise shaping implementation in two-step/SAR ADC architectures based on delayed quantization error
Author :
Zhijie Chen ; Peng Zhang ; Hegong Wei ; Sai-Weng Sin ; Seng-Pan U ; Martins, Rui P. ; Zhihua Wang
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
Noise shaping can aid ADC architectures to achieve high resolution. A new technique to increase ADC resolution is presented in this paper. It is based on Nyquist-rate ADC architectures and uses delayed analog quantization error to implement noise shaping function. The new technique is implemented using two-step and SAR ADC respectively. When the noise shaping order is one and the Over-Sampling Rate (OSR) is only 8, the system based on 5-bit two-step ADC can achieve the SNDR of 62.5-dB, while the SNDR of the system based on 6-bit SAR ADC can obtain 59.6-dB. Actually, this new technique consumes tiny amount of extra power. Although the speed of the system is decreased slightly because of the small OSR, as the resolution is increased significantly. As a result, the Figure of Merit (FOM) of the overall ADC can be improved.
Keywords :
Nyquist diagrams; error analysis; quantisation (signal); ADC resolution; Nyquist-rate ADC architectures; delayed analog quantization error; noise shaping function; over-sampling rate; successive approximation register; two-step/SAR ADC architectures; word length 5 bit; word length 6 bit; Generators; Noise; Quantization; Radio access networks; Nyquist ADC; noise shaping; over-sampling ADC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026454
Filename :
6026454
Link To Document :
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