Title :
A passive Excess-Loop-Delay compensation technique for Gm-C based continuous-time ΣΔ modulators
Author :
Chen-Yan Cai ; Yang Jiang ; Sai-Weng Sin ; Seng-Pan U ; Martins, Rui P.
Author_Institution :
State Key Lab. of Analog & Mixed-Signal VLSI, Univ. of Macau, Macao, China
Abstract :
A method to compensate the Excess Loop Delay (ELD) in CT ΣΔ modulators using Gm-C loop filter is presented. The proposed circuit architecture uses a resistor in series with the integration capacitor to obtain a feed-forward adder in the Gm-C integrator. The proposed ELD compensation is based on the Proportional Integrating (PI) - element method for low power dissipation and simple implementation, and it is verified through the design of a 2nd order CT ΣΔ modulator which uses a Gm-C integrator as the 2nd stage of the loop filter. To further demonstrate the efficiency of the technique a Non-Return-to-Zero (NRZ) feedback is utilized due to its larger sensitivity to ELD. Simulation results show that a 68.9dB SNDR can be achieved with an ELD close to half clock period, while the system will be unstable without compensation for such an amount of the loop delay. These results confirm the effectiveness of the proposed ELD compensation method in Gm-C filter based CT ΣΔ modulators.
Keywords :
adders; compensation; delays; filters; sigma-delta modulation; 2nd order CT ΣΔ modulator; Gm-C integrator; Gm-C loop filter; circuit architecture; continuous-time ΣΔ modulators; excess loop delay; feed-forward adder; integration capacitor; low power dissipation; nonreturn-to-zero feedback; passive excess-loop-delay compensation technique; proportional integrating-element method; resistor; Modulation; Neodymium; Optical signal processing;
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2011.6026455