Interconnect synthesis: meeting the challenges of high speed design

The interconnect synthesis approach drives the physical design process through a transmission line simulator. This allows designers to specify electrical rules such as delay and crosstalk. Since the simulator understands these terms and is driving the physical process in real time, no translation to geometrical assumptions is ever necessary. This eliminates the errors involved in the translation and produces designs that are electrically correct. When production volumes are high and profit margins are low (as in the PC motherboard market) the goal is to guarantee that 100% of the boards manufactured are electrically functional. Since time-to-market is also critical, and high-speed issues can slow down the design process, the interconnect synthesis approach to physical design is the only solution that has proven to significantly reduce board design times