Routing-aware placement algorithms for modern analog integrated circuits

Due to continuous scaling in modern process technologies, more and more analog and mixed-signal circuits are integrated with digital units to realize system-on-a-chip. Since analog designs generally need comprehensive analysis to ensure circuit performances, it usually requires more development time to implement analog blocks than digital ones. Because of the difficulties in analog designs and the lack of support by design automation tools, analog circuits become bottleneck in the chip design flow. Although some studies have been proposed to consider placement of analog circuits recently, they usually ignore routing problems. In this paper, some issues about placement and routing for analog circuits are discussed, which include prevention of noisy signals in symmetry islands, congestion elimination in practical placement, and routing area reduction in capacitor arrays. By considering placement and routing at the same time, the routing-induced problems which may cause unwanted effects to deteriorate analog layout quality can be prevented.