Title :
Generalized constraint generation for analog circuit design
Author :
Charbon, E. ; Malavasi, E. ; Sangiovanni-Vincentelli, A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
A general methodology is presented for the generation of a complete set of constraints on interconnect parasitics, parasitic mismatch and on the physical topology of analog circuits. The parasitic and matching constraints are derived from high-level performance specifications by means of sensitivity analysis in time and frequency domain using quadratic optimization. Topological constraints are obtained by using sensitivity and matching information on devices and interconnect as well as graph-based techniques to extract the necessary geometric information.
Keywords :
analogue circuits; analog circuit design; frequency domain; general methodology; generalised constraint generation; geometric information; graph-based techniques; high-level performance specifications; interconnect; interconnect parasitics; matching constraints; parasitic mismatch; physical topology; quadratic optimization; sensitivity analysis; time domain analysis; Analog circuits; Analog computers; Analog integrated circuits; Circuit topology; Degradation; Frequency domain analysis; Integrated circuit interconnections; Integrated circuit synthesis; Physics computing; Sensitivity analysis;
Conference_Titel :
Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-4490-7
DOI :
10.1109/ICCAD.1993.580089
