DocumentCode :
3407001
Title :
Tri-state bus conflict checking method for ATPG using BDD
Author :
Koseko, Y. ; Ogihara, T. ; Murai, S.
Author_Institution :
Mitsubishi Electric Corp., Ohfuna, Kamakura, Japan
fYear :
1993
fDate :
7-11 Nov. 1993
Firstpage :
512
Lastpage :
515
Abstract :
This paper describes a bus design rule checking method which efficiently checks whether signal conflicts may occur on the tri-state buses in a given circuit and whether the buses may be in floating states. By using BDD (binary decision diagram) representations, a practical bus design rule check program has been obtained.
Keywords :
diagrams; ATPG; automatic test pattern generation; binary decision diagram; bus design rule checking method; conflict checking method; floating states; signal conflicts; tri-state buses; Automatic test pattern generation; Binary decision diagrams; Circuit testing; Design methodology; Driver circuits; Laboratories; Large scale integration; Logic design; Logic testing; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-4490-7
Type :
conf
DOI :
10.1109/ICCAD.1993.580106
Filename :
580106
Link To Document :
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