DocumentCode :
3407078
Title :
Verification of large synthesized designs
Author :
Brand, D.
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
1993
fDate :
7-11 Nov. 1993
Firstpage :
534
Lastpage :
537
Abstract :
The problem of checking equality of Boolean functions can be solved successfully using existing techniques for only a limited range of examples. We extend the range by using a test generator and the divide and conquer paradigm.
Keywords :
Boolean functions; Boolean functions; design verification; divide and conquer paradigm; large synthesized designs; test generator; Binary decision diagrams; Boolean functions; Counting circuits; Error correction; Logic testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-4490-7
Type :
conf
DOI :
10.1109/ICCAD.1993.580110
Filename :
580110
Link To Document :
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