DocumentCode
3407181
Title
Highly-accurate PLL speed control by adding P+D repetitive control
Author
Machida, H. ; Inoue, Takeru ; Kobayashi, Fukiko
Author_Institution
Control Eng., Maizuru Nat. Coll. of Technol., Kyoto, Japan
fYear
2011
fDate
7-10 Aug. 2011
Firstpage
1
Lastpage
4
Abstract
PLL speed control system has excellent `macroscopic´, or long-term, steadiness. However, `microscopic´ speed fluctuation is another important issue. It is called `cogging,´ caused by electro-magnetic structural property of motor. Although repetitive control is useful for reducing such fluctuation, stability condition is hard to be satisfied for conventional PLL speed control systems. In this article, we propose a P+D repetitive controller to ease this condition. Rather simple implementation with an FPGA and effective experimental results revealing triple reduction in amplitude are shown.
Keywords
field programmable gate arrays; phase locked loops; stability; velocity control; FPGA; P+D repetitive control; PLL speed control system; electro-magnetic structural property; speed fluctuation; stability condition; Facsimile; Frequency control; Lead; Pulse width modulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location
Seoul
ISSN
1548-3746
Print_ISBN
978-1-61284-856-3
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2011.6026560
Filename
6026560
Link To Document