DocumentCode
3407240
Title
Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard
Author
Sinangil, M.E. ; Chandrakasan, Anantha P. ; Sze, Vivienne ; Minhua Zhou
Author_Institution
Massachusetts Inst. of Technol., Cambridge, MA, USA
fYear
2012
fDate
Sept. 30 2012-Oct. 3 2012
Firstpage
1529
Lastpage
1532
Abstract
This work presents a hardware-aware search algorithm for HEVC motion estimation. Implications of several decisions in search algorithm are considered with respect to their hardware implementation costs (in terms of area and bandwidth). Proposed algorithm provides 3X logic area in integer motion estimation, 16% on-chip reference buffer area and 47X maximum off-chip bandwidth savings when compared to HM-3.0 fast search algorithm.
Keywords
motion estimation; search problems; video coding; HEVC standard; HM-3.0 fast search algorithm; hardware implementation costs; hardware-aware development; high-efficiency video coding standard; integer motion estimation; logic area; off-chip bandwidth savings; on-chip reference buffer area; Bandwidth; Computer architecture; Encoding; Engines; Hardware; Motion estimation; Vectors; HEVC; hardware-aware; motion estimation; motion search algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Image Processing (ICIP), 2012 19th IEEE International Conference on
Conference_Location
Orlando, FL
ISSN
1522-4880
Print_ISBN
978-1-4673-2534-9
Electronic_ISBN
1522-4880
Type
conf
DOI
10.1109/ICIP.2012.6467163
Filename
6467163
Link To Document