Study of correlations among noise sources in ΣΔ modulator models

A study of the impact of correlations among noise sources in the behavioral modeling of Sigma Delta modulators (ΣΔM) is presented. The procedure followed for obtaining closed-form equations for the input-referred noise in a Switched Capacitor (SC) integrator including correlations among sources is illustrated. A behavioral model for a second order, five-level ΣΔM including noise source correlations was developed in Verilog-A. Model validation was carried via transistor-level SPICE simulations. Results compare this model against both, a transistor level representation and an uncorrelated behavioral model of a ΣΔM. The proposed model was able to produce SNR results with a maximum deviation of 1.68dB with respect to transistor-level simulations, with a floor noise comparable to that of the transistor-level model. The obtained results did not show significant changes in execution time between behavioral models with and without correlations.