DocumentCode :
3407717
Title :
Analog dynamic reconfiguration for area-efficient implementation
Author :
Kobayashi, Fukiko ; Higuchi, Suemi
Author_Institution :
Dept. Syst. Design & Inf., Kyushu Inst. of Technol., Fukuoka, Japan
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
Dynamic reconfiguration, which, including some commercial products, have widely been developed recently, is attempted on PSoC. Conditions for successful operation are clarified, and a 2nd-order biquad low-pass filter is implemented with an acceptable performance.
Keywords :
biquadratic filters; low-pass filters; system-on-chip; 2nd-order biquad low-pass filter; PSoC; analog dynamic reconfiguration; area-efficient implementation; Clocks; Switches; FPAA; FPGA; PSoC; biquad filter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026590
Filename :
6026590
Link To Document :
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