Tradeoff between pre-switching processing and routing network complexity in ATM packet switches

In traditional sort-banyan networks, the majority of complexity (both time and hardware) comes from the sorting network part. To reduce the overall complexity of the network, one way is to increase the complexity of the routing network so that the amount and hence the complexity of pre-switching processing, like sorting and contention resolution, can be reduced. We investigate the tradeoff between pre-switching processing and the routing network complexity of the switch based on the sort-Clos principle, which is the generalization of the sort-banyan principle. We propose a k-expanded Clos network architecture in which the parameter k controls the amount of hardware complexity in the Clos network. The k-expanded Clos network has the non-blocking and self-routing properties and can be recursively constructed. We show that the complexity of the switch based on the k-expanded Clos network can be adjusted which allows the network to be adapted to different implementation requirements