Performance analysis of new Banyan networks with input queueing for ATM switching

To support integrated services, a fast packet switch in ATM networks must be capable of handling the requirements of different services. Multistage switches built out of very simple switching elements have shown to be a very promising candidate for the switching fabrics of broadband networks according to the ATM standard due to their suitability to VLSI implementation and their self-routing capability. A new buffering strategy used in Banyan switches is proposed, and present a queueing analysis based on the proposed buffering strategy. The analyzed results are compared to the performance of the traditional input buffer strategy. Based on the results, good performance of the proposed buffering strategy is demonstrated in throughput, average delay time, and cell loss rate