DocumentCode :
3408351
Title :
Power analysis and optimization for high-speed I/O transceivers
Author :
Kwangmo Jung ; Yue Lu ; Alon, Elad
Author_Institution :
Univ. of California at Berkeley, Berkeley, CA, USA
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper analytically optimizes the overall power consumption of the signaling path of a high-speed link utilizing a source-series terminated (SST) transmitter, either a receive continuous-time linear equalizer (CTLE) or transmit pre-emphasis, and operating over a simple single-pole channel. The analysis derives the optimal allocation between transmit swing and receive gain as well as the allocation of power consumption between the two sides. The analysis also shows that the pre-driver overheads inherent in implementing programmable transmit pre-emphasis make the receive CTLE a substantially more power-efficient solution.
Keywords :
equalisers; low-power electronics; transceivers; continuous-time linear equalizer; high-speed I/O transceivers; high-speed link; optimization; power analysis; single-pole channel; source-series terminated transmitter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026623
Filename :
6026623
Link To Document :
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