• DocumentCode
    3408369
  • Title

    A BER-aware ADC design guideline for 112 Gb/s optical DP-QPSK systems

  • Author

    Soonwon Kwon ; Sejun Jeon ; Hyeon-Min Bae

  • Author_Institution
    Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
  • fYear
    2011
  • fDate
    7-10 Aug. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A bit-error-rate (BER) aware design guideline for 56GS/s analog-to-digital converters (ADC) is presented for 112Gb/s coherent optical communication systems. The effective number of bits (ENOB) has been used extensively to quantify the performance of an ADC even though it is only a sufficient condition for the system level BER. In this paper, the relationship between the ENOB of an ADC measured with sinusoids and the system level BER is formulated. The required frequency responses of the ENOB for given OSNR penalty specifications are provided as well. The BER-aware ADC design will lead to power and area reduction by relaxing the ADC requirements for 112Gb/s coherent optical communication systems.
  • Keywords
    analogue-digital conversion; error statistics; quadrature phase shift keying; BER-aware ADC design guideline; analog-to-digital converter; bit-error-rate aware design guideline; coherent optical communication system; optical DP-QPSK system; system level BER; Bandwidth; Chromatic dispersion; Optical noise; Signal to noise ratio; Transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
  • Conference_Location
    Seoul
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-61284-856-3
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2011.6026624
  • Filename
    6026624