Title :
A 60 GHz dual-mode amplifier in 65nm CMOS technology
Author :
Akbarpour, M. ; Helaoui, Mohamed ; Ghannouchi, Fadhel M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
Abstract :
A dual-mode power amplifier is designed in 65nm CMOS technology to have high efficiency at power back-off. It consists of two branches, one branch is a two-stage class A amplifier and the other is a three-stage class C amplifier. This amplifier has two different modes of operation at power back-off and at peak power. The main design issues for having high efficiency at output power back-off are discussed and considered in the design. Simulation results show a power-added efficiency of more than 13% at 5 dB output power range and 14.2dBm saturated output power.
Keywords :
CMOS integrated circuits; field effect MIMIC; millimetre wave power amplifiers; CMOS technology; class A amplifier; class C amplifier; dual mode power amplifier; frequency 60 GHz; power back off; size 60 nm; CMOS integrated circuits; CMOS technology;
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2011.6026636
