DocumentCode
3408635
Title
A method to calculate redundancy coverage for FLASH memories
Author
Matarress, S. ; Fasoli, L.
Author_Institution
STMicroelectronics, Fremont, CA, USA
fYear
2001
fDate
2001
Firstpage
41
Lastpage
44
Abstract
Presents a method to calculate the redundancy coverage for FLASH memory. The method can be used to compare different redundancy architectures and gives the probability of repairing a certain number of random failures. After a brief introduction, the hypothesis and the method are presented. Some illustrative examples are provided
Keywords
failure analysis; flash memories; memory architecture; probability; redundancy; FLASH memories; random failures; redundancy architectures; redundancy coverage; repair probability; Circuits; Flash memory; Guidelines; Nonvolatile memory; Probability; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, IEEE International Workshop on, 2001.
Conference_Location
San Jose, CA
Print_ISBN
0-7695-1242-9
Type
conf
DOI
10.1109/MTDT.2001.945226
Filename
945226
Link To Document