An efficient paired-net routing algorithm for high-speed bipolar LSIs

Author

Takei, Y. ; Onozawa, A. ; Kawai, E. ; Kitazawa, H.

Author_Institution

NTT Syst. Electron. Labs., Kanagawa, Japan

fYear

1997

fDate

13-15 Mar 1997

Firstpage

2

Lastpage

7

Abstract

This paper proposes an efficient paired-net routing algorithm. A paired net consists of two nets assigned to adjacent tracks and columns. The paired-net routing approach is applied for differential drive nets in a bipolar ECL LSI to decrease signal skew and enhance signal integrity. Paired nets can cause a new type of cyclic constraint, which does not appear in the conventional vertical constraint graph. To wire these paired nets, the new type of cyclic constraint must be detected and resolved. We applied our approach to two actual bipolar ECL circuits: a 4.0-k-gate circuit, which operated at 3 Gbit/s, and a 5.6-k-gate circuit, which operated at 2.5 Gbit/s. The experimental results verify the effectiveness of our paired-net routing approach

Keywords

bipolar integrated circuits; emitter-coupled logic; graph theory; integrated circuit layout; large scale integration; network routing; 2.5 Gbit/s; 3 Gbit/s; ECL circuit; cyclic constraint; differential drive net; high-speed bipolar LSI; paired-net routing algorithm; signal integrity; signal skew; vertical constraint graph; Capacitance; Circuits; Electronic mail; High speed optical techniques; Laboratories; Large scale integration; Multimedia systems; Optical crosstalk; Optical fiber networks; Routing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 1997. Proceedings. Seventh Great Lakes Symposium on

Conference_Location

Urbana-Champaign, IL

ISSN

1066-1395

Print_ISBN

0-8186-7904-2

Type

conf

DOI

10.1109/GLSV.1997.580402

Filename

580402