Title :
A low-power motion estimation block for low bit-rate wireless video
Author :
Richmond, R. Steven, II ; Ha, Dong Sam
Author_Institution :
Hewlett-Packard Co., Fort Collins, CO, USA
Abstract :
Presents a low-power design of a motion estimation block targeting a low-bit rate video codec H.263. The block is based on the four-step search algorithm. The proposed design offers up to 38% power reduction for logic blocks alone over a "baseline" implementation of the four-step search (4SS) algorithm and up to 58% power reduction over a baseline model of the three-step search (TSS) algorithm. In addition, our design reduces power dissipation of an on-chip memory by up to 32% over the 4SS and 27% over the TSS
Keywords :
low-power electronics; mobile communication; motion estimation; video codecs; video coding; four-step search algorithm; logic blocks; low-bit rate video codec; low-power design; mobile video encoding; motion estimation block; on-chip memory; power reduction; wireless video; Algorithm design and analysis; Bandwidth; Equations; Government; Logic design; Motion estimation; Neural networks; Power dissipation; Power system modeling; Video codecs;
Conference_Titel :
Low Power Electronics and Design, International Symposium on, 2001.
Conference_Location :
Huntington Beach, CA
Print_ISBN :
1-58113-371-5
DOI :
10.1109/LPE.2001.945373
