Automatic synthesis of VLSI architectures for arbitrary lifting-based filter banks and transforms

Recently, the conventional lifting scheme that is widely used for the construction of wavelets and 2-channel filter banks has been extended to M-channel filter banks (M > 2). This extension brings up the beneficial properties of the lifting scheme to a broader range of applications, like discrete cosine transforms. There exist many hand-crafted lifting-based VLSI architectures, which mostly concentrate on a single and specific target application having a fixed data throughput and resource consumption. However, the reusability of such architectures is limited due to the lack of scalability and flexibility. To overcome this issue, we present a novel design methodology for automatic synthesis of VLSI architectures that are suitable for arbitrary lifting-based M-channel filter banks and transforms. The methodology offers wide-ranging design space exploration with varying resource consumption and data throughput tradeoffs, as it is desired in modern system-on-chip design.