Enhanced multi-threshold (MTCMOS) circuits using variable well bias

Author

Kosonocky, Stephen V. ; Irnmediato, M. ; Cottrell, Peter ; Hook, Terence ; Mann, Randy ; Brown, Jeff

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

2001

fDate

2001

Firstpage

165

Lastpage

169

Abstract

Advanced CMOS technology can enable high levels of performance with reduced active power at the expense of increased standby leakage, MTCMOS has previously been described as a method of reducing leakage in standby modes, by addition of a power supply interrupt switch. Enhancements using variable well bias and layout techniques are described and demonstrate increased performance and reduced leakage over conventional MTCMOS circuits

Keywords

CMOS digital integrated circuits; integrated circuit layout; leakage currents; low-power electronics; active power; layout technique; leakage control; low-power digital circuit design; multi-threshold CMOS circuit; power supply interrupt switch; standby mode; variable well bias; Application software; CMOS logic circuits; CMOS technology; Control systems; Costs; Logic circuits; Logic devices; Power supplies; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, International Symposium on, 2001.

Conference_Location

Huntington Beach, CA

Print_ISBN

1-58113-371-5

Type

conf

DOI

10.1109/LPE.2001.945394

Filename

945394

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3410134