DocumentCode :
341020
Title :
Non-stop processor field upgrading with layered software architecture
Author :
Nakamura, Hiroyuki ; Futagami, Shin
Author_Institution :
NTT Network Service Syst. Labs., Tokyo, Japan
Volume :
3
fYear :
1998
fDate :
1998
Firstpage :
1594
Abstract :
Switching systems making up a telecommunications network are faced with a rising performance curve of requirements for coping with a growing diversity of advanced service needs. One effective performance-boosting measure is to upgrade the processor, taking advantage of continual advances in general-purpose microprocessor technology. In the case of a switching node, techniques must be established for upgrading the processor without interrupting normal service. This paper proposes a technique for performing processor upgrades in a system that adopts a layered software architecture aimed at multivendor environment. The effectiveness of this technique is confirmed through application to an actual switching node
Keywords :
electronic switching systems; microprocessor chips; operating systems (computers); software architecture; telecommunication computing; advanced service; general-purpose microprocessor technology; layered software architecture; multivendor environment; nonstop processor field upgrading; operating systems; performance curve; switching node; switching systems; telecommunications network; Application software; Computer architecture; Control systems; Hardware; Laboratories; Microprocessors; Software architecture; Switching systems; System buses; Telecommunication switching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 1998. GLOBECOM 1998. The Bridge to Global Integration. IEEE
Conference_Location :
Sydney,NSW
Print_ISBN :
0-7803-4984-9
Type :
conf
DOI :
10.1109/GLOCOM.1998.776659
Filename :
776659
Link To Document :
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