DocumentCode :
3410436
Title :
Algorithm and hardware support for branch anticipation
Author :
Yu, Ted Zhihong ; Sha, Edwin H M ; Passos, N. ; Ju, Roy Dz-ching
Author_Institution :
Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
fYear :
1997
fDate :
13-15 Mar 1997
Firstpage :
163
Lastpage :
168
Abstract :
Multi-dimensional systems containing nested loops are widely used to model scientific applications such as image processing, geophysical signal processing and fluid dynamics. However, branches within these loops may degrade the performance of pipelined architectures. This paper presents the theory, supporting hardware and experiments of a novel technique, based on multi-dimensional retiming, for reducing pipeline hazards caused by branches within nested loops. This technique, called Multi-Dimensional Branch Anticipation Scheduling, is able to achieve near-optimal schedule length for nested loops containing branch instructions
Keywords :
data flow graphs; multidimensional systems; pipeline processing; scheduling; branch instructions; data flow graphs; hardware support; multi-dimensional branch anticipation scheduling; multi-dimensional retiming; multi-dimensional systems; near-optimal schedule length; nested loops; pipelined architectures; Flow graphs; Hardware; Multidimensional systems; Optimal scheduling; Parallel processing; Pipeline processing; Processor scheduling; Resource management; Scheduling algorithm; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1997. Proceedings. Seventh Great Lakes Symposium on
Conference_Location :
Urbana-Champaign, IL
ISSN :
1066-1395
Print_ISBN :
0-8186-7904-2
Type :
conf
DOI :
10.1109/GLSV.1997.580532
Filename :
580532
Link To Document :
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