• DocumentCode
    3411588
  • Title

    A 0.9 V 1.5 mW continuous-time ΔΣ modulator for WCDMA

  • Author

    Ueno, Takeshi ; Itakura, Tetsuro

  • Author_Institution
    Toshiba, Kawasaki, Japan
  • fYear
    2004
  • fDate
    15-19 Feb. 2004
  • Firstpage
    78
  • Abstract
    A second-order continuous-time ΔΣ modulator for a WCDMA RX is implemented with inverter-based OTAs, enabling operation at a voltage of 0.9 V. The OTAs are balanced by using CMFB. The modulator consumes only 1.5 mW and occupies 0.12 mm2 in a 0.13 μm CMOS process. SNDR is 50.9 dB over a bandwidth of 1.92 MHz.
  • Keywords
    CMOS integrated circuits; code division multiple access; continuous time filters; delta-sigma modulation; distortion; integrated circuit noise; low-power electronics; operational amplifiers; radio receivers; 0.13 micron; 0.9 V; 1.5 mW; 1.92 MHz; CMFB balanced OTA; CMOS process; SNDR; WCDMA; WCDMA RX; bandwidth; continuous-time ΔΣ modulator; inverter-based OTA; modulator power consumption; operation voltage; second-order continuous-time delta-sigma modulator; CMOS process; CMOS technology; Delta modulation; Feedback; Low voltage; Multiaccess communication; Operational amplifiers; Resistors; Sampling methods; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8267-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2004.1332602
  • Filename
    1332602
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3411588