Design of a bidirectional current mode multiplier

This paper describes a bidirectional current mode implementation of a 16-bit redundant binary multiplier. The circuit uses a Booth recoder and redundant binary adder tree to add up four partial products for its carry-propagation-free addition and routing regularity. It uses both logic gates and low-precision analog components (switched current sources and current mirrors) in order to reduce the routing area and transistor count. The result is a competitively fast multiplier with a smaller area than its pure digital implementation.