DocumentCode :
3411775
Title :
Reliability of SAR ADCs and associated embedded instrument detection
Author :
Jinbo Wan ; Kerkhoff, Hans G.
Author_Institution :
Testable Design & Test of Integrated Syst. (TDT) Group, Univ. of Twente, Enschede, Netherlands
fYear :
2015
fDate :
24-26 June 2015
Firstpage :
1
Lastpage :
5
Abstract :
Successive-approximation-register (SAR) analog-to-digital converters (ADCs) represent the majority of the ADC market from medium to high resolution ADCs. Due to its low power, high-performance and small area in Mega-Hz range, SAR ADCs are increasingly attractive for todays safe-critical applications like automotive. Recently, much research has been carried out on self-calibrations of SAR ADCs, which are mostly focussed on passive capacitor banks inside SAR ADCs. However the reliability of SAR ADCs is rarely reported, which is more related to the active circuit parts and is also essential for safe-critical applications. In this paper, the focus will be on the reliability effects and associated embedded instrument detection of a 10-bits SAR ADC in 65nm CMOS technology. The NBTI degradation in the bootstrapped switches, self-timing asynchronous SAR logics, input buffer and comparator inside a 10-bits SAR ADC are investigated as well as the overall performance degradation of the ADC. Finally, embedded instrument methods are proposed to detect these reliability influences in SAR ADCs.
Keywords :
CMOS integrated circuits; active networks; analogue-digital conversion; asynchronous circuits; bootstrap circuits; capacitors; comparators (circuits); integrated circuit reliability; negative bias temperature instability; CMOS technology; NBTI degradation; SAR ADC reliability; active circuit; analog-to-digital converters; associated embedded instrument detection; bootstrapped switches; comparator; input buffer; passive capacitor banks; safe-critical applications; self-calibrations; self-timing asynchronous SAR logics; size 65 nm; successive approximation register; word length 10 bit; Aging; Capacitors; Clocks; Degradation; Delays; Latches; Reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed-Signal Testing Workshop (IMSTW), 2015 20th International
Conference_Location :
Paris
Type :
conf
DOI :
10.1109/IMS3TW.2015.7177870
Filename :
7177870
Link To Document :
بازگشت