DocumentCode
3411816
Title
A 3.9 μm pixel pitch VGA format 10 b digital image sensor with 1.5-transistor/pixel
Author
Takahashi, Hidekazu ; Kinoshita, Masakuni ; Morita, Kazumichi ; Shirai, Takahiro ; Sato, Toshiaki ; Kimura, Takayuki ; Yuzurihara, Hiroshi ; Inoue, Shunsuke
Author_Institution
Canon, Ayase, Japan
fYear
2004
fDate
15-19 Feb. 2004
Firstpage
108
Abstract
A CMOS image sensor with a shared 1.5 transistor/pixel architecture and buried photodiode with complete charge transfer capability is described. The sensor achieves a 330 μV noise floor and 50 pA/cm2 dark current at 45°C. The chip is fabricated in a thin planarized 0.35 μm 1P2M CMOS process.
Keywords
CMOS image sensors; buried layers; dark conductivity; electric current; integrated circuit measurement; integrated circuit noise; photodiodes; planarisation; 0.35 micron; 10 bit; 3.9 micron; 330 muV; 45 C; CMOS image sensor; VGA format digital image sensor; buried photodiode; complete charge transfer capability; dark current; pixel pitch; sensor noise floor; shared transistor/pixel architecture; thin planarized 1P2M CMOS process; CMOS image sensors; CMOS process; Charge transfer; Clocks; Digital images; Image sensors; Photodiodes; Pixel; Sensor phenomena and characterization; Turning;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
ISSN
0193-6530
Print_ISBN
0-7803-8267-6
Type
conf
DOI
10.1109/ISSCC.2004.1332617
Filename
1332617
Link To Document