Fast test at wafer-level for endurance of tunnel oxide

Author

Sik-Han Sob ; Messick, Cleston ; Chen, Chih-Chang ; Liu, Chuan-Pu ; Bakel, B. ; Peterson, Rex ; Sadwick, Larry

Author_Institution

Nat. Semicond. Corp., West Jordan, UT, USA

fYear

1995

fDate

22-25 Oct. 1995

Firstpage

136

Lastpage

141

Abstract

The standard method for characterizing the quality of thin oxide is to use charge to breakdown (QBD) either by JRAMP or VRAMP. In devices such as FLASH and EEPROM where bidirectional current injection through the thin tunneling oxide is a normal mode of operation, QBD does not correlate well with endurance. This study looks at the temperature and electric field dependency of the endurance of thin tunnel oxide. Data show that the thermal effect of endurance can be modeled by the Arrhenius function and it also has an exponential 1/E dependence. Temperature and electric field can be used as accelerating factors for designing a fast test for endurance. The test time for the endurance can be cut down to less than 10 s by adjusting either of these accelerating factors. A proposal for implementing a fast test at wafer level for endurance of the thin tunnel oxide is given.

Keywords

EPROM; dielectric thin films; electric breakdown; electric fields; integrated circuit reliability; integrated circuit testing; integrated memory circuits; tunnelling; Arrhenius function; accelerating factor; electric field dependency; fast test method; temperature dependency; thermal effect; thin tunneling oxide; tunnel oxide endurance; wafer-level test; Cities and towns; Design for quality; EPROM; Electric breakdown; Life estimation; Nonvolatile memory; Proposals; Temperature dependence; Testing; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Reliability Workshop, 1995. Final Report., International

Conference_Location

Lake Tahoe, CA, USA

Print_ISBN

0-7803-2705-5

Type

conf

DOI

10.1109/IRWS.1995.493587

Filename

493587