DocumentCode :
3411987
Title :
Automated synthesis of Time-Triggered Architecture-based TrueTime models for platform effects simulation and analysis
Author :
Hemingway, G. ; Porter, J. ; Kottenstette, N. ; Nine, H. ; VanBuskirk, C. ; Karsai, G. ; Sztipanovits, J.
Author_Institution :
Inst. for Software Integrated Syst., Vanderbilt Univ., Nashville, TN, USA
fYear :
2010
fDate :
8-11 June 2010
Firstpage :
1
Lastpage :
7
Abstract :
The TrueTime toolbox simulates real-time control systems, including platform-specific details like process scheduling, task execution and network communications. Analysis using these models provides insight into platform-induced timing effects, such as jitter and delay. For safety-critical applications, the Time-Triggered Architecture (TTA) has been shown to provide the necessary services to create robust, fault-tolerant control systems. Communication induced timing effects still need to be simulated and analyzed even for TTA-compliant models. The process of adapting time-invariant control system models, through the inclusion of platform specifics, into TTA-based TrueTime models requires significant manual effort and detailed knowledge of the desired platform´s execution semantics. In this paper, we present an extension of the Embedded Systems Modeling Language (ESMoL) tool chain that automatically synthesizes TTA-based TrueTime models. In our tools, timeinvariant Simulink models are imported into the ESMoL modeling environment where they are annotated with details of the desired deployment platforms. A constraint-based offline scheduler then generates the static TTA execution schedules. Finally, we synthesize new TrueTime models that encapsulate all of the TTA execution semantics. Using this approach it is possible to rapidly prototype, evaluate, and modify controller designs and their hardware platforms to better understand deployment induced performance and timing effects.
Keywords :
control engineering computing; embedded systems; fault tolerant computing; safety-critical software; software architecture; specification languages; ESMoL modeling environment; ESMoL tool chain; Embedded Systems Modeling Language; Simulink; TTA execution semantics; TTA-compliant model; TrueTime toolbox; communication induced timing effect; constraint-based offline scheduler; delay; fault-tolerant control system; jitter; network communication; platform-induced timing effect; process scheduling; real-time control system; robust control; safety-critical application; task execution; time-invariant control system; time-triggered architecture; Adaptation model; Analytical models; Hardware; Kernel; Semantics; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping (RSP), 2010 21st IEEE International Symposium on
Conference_Location :
Fairfax, VA
Print_ISBN :
978-1-4244-7073-0
Electronic_ISBN :
978-1-4244-7072-3
Type :
conf
DOI :
10.1109/RSP.2010.5656335
Filename :
5656335
Link To Document :
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