Title :
Electronic alignment for proximity communication
Author :
Drost, Robert ; Ho, Ron ; Hopkins, Debbie ; Sutherland, I.
Author_Institution :
Sun MicroSysterms Inc., Mountain View, CA, USA
Abstract :
This work presents an electronic alignment mechanism for capacitively-coupled proximity communication. On an experimental chip, position offsets of up to +/-100μm are electrically corrected to within 6.25μm. A 0.35μm experimental CMOS chip communicates at 1.35Gb/s with a BER ≤10-10.
Keywords :
CMOS integrated circuits; data communication equipment; integrated circuit interconnections; multiplexing equipment; switching circuits; CMOS chip; capacitive coupling; capacitively-coupled proximity communication; chip misalignment; electronic alignment mechanism; multiplexing; on-chip alignment structure; position offsets; random bit patterns; residual integer misalignment; switching circuits; two-dimensional multiplexer; Assembly; Capacitance; Capacitors; Coupling circuits; Glass; Multiplexing; Sun; Switching circuits; Thermal expansion; Wires;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332635
