Title :
Reliability prediction through critical area analysis
Author :
Mattick, J.H.N. ; Kelsall, R.W. ; Miles, R.E.
Author_Institution :
Dept. of Electron. & Electr. Eng., Leeds Univ., UK
Abstract :
Critical Area (CA) analysis can be applied to the prediction of post-fabrication reliability of integrated circuits. However, the accuracy of the prediction is dependent on the validity of the chosen defect model. A comparison, highlighting the importance of this selection, is made between the results obtained using two differently shaped models. In conclusion, a novel CA analysis technique is outlined, which provides both quick and accurate computation of layout CA.
Keywords :
integrated circuit layout; integrated circuit reliability; integrated circuit yield; reliability theory; critical area analysis; defect model; integrated circuits; layout partitioning; layout reliability; post-fabrication reliability; reliability prediction; yield; Accuracy; Failure analysis; Frequency; Integrated circuit reliability; Manufacturing; Pattern analysis; Predictive models; Robustness; Semiconductor device modeling; Stochastic processes;
Conference_Titel :
Integrated Reliability Workshop, 1995. Final Report., International
Conference_Location :
Lake Tahoe, CA, USA
Print_ISBN :
0-7803-2705-5
DOI :
10.1109/IRWS.1995.493604
