DocumentCode
3412226
Title
100MPackets/s fully self-timed priority queue: FQ
Author
Ogura, M. ; Ohishi, Yasutake ; Hayashi, H. ; Terada, H.
fYear
2004
fDate
15-19 Feb. 2004
Firstpage
150
Abstract
This priority queuing module is integrated as part of QoS functions in a data-driven network processor chip. Since the whole FQ circuit is realized by a fully self-timed folded pipeline, each prioritized 128b packet arriving at 100Mpackets/s is queued and scheduled autonomously in a self-timed manner.
Keywords
CMOS integrated circuits; data communication equipment; large scale integration; pipeline processing; protocols; quality of service; queueing theory; telecommunication computing; telecommunication congestion control; timing; CMOS six-metal layer; FQ circuit; FQ module; LSI design limitation constraints; QoS functions; automatic differentiation capability; data branching; data-driven network processor chip; divide and conquer design principle; folded queue; fully self-timed folded pipeline; fully self-timed priority queue; merging transfer; mutual interactions; priority queuing module; Clocks; Delay; Large scale integration; Latches; Merging; Pipelines; Signal detection; Signal generators; Signal processing; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
ISSN
0193-6530
Print_ISBN
0-7803-8267-6
Type
conf
DOI
10.1109/ISSCC.2004.1332638
Filename
1332638
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