• DocumentCode
    3412290
  • Title

    A new duty cycle parallel control method and FPGA implementation for AC-DC converters with power factor correction (PFC)

  • Author

    Zhang, Wanfeng ; Feng, Guang ; Liu, Yan-Fei ; Wu, Bin

  • Author_Institution
    Dept. of Electr. & Comput.Eng., Queen´´s Univ., Kingston, Ont.
  • Volume
    2
  • fYear
    2005
  • fDate
    6-10 March 2005
  • Firstpage
    805
  • Abstract
    A new duty cycle parallel control method for AC-DC converter with power factor correction is proposed. The duty cycle required to achieve unity power factor consists of two terms: current term and voltage term. They are calculated directly based on the reference current and sensed inductor current, input voltage and output voltage. It requires only one multiplication and three addition operations for digital implementation so that the proposed PFC control method can be implemented by a low cost DSP, microprocessor, FPGA or an ASIC to achieve high switching frequency. This duty cycle parallel control essentially distinguishes from the conventional current mode control in which there are two regulators, one for voltage regulation and one for current regulation. Test results for a digital PFC implementation show that the proposed method can achieve unity power factor under both steady and transient state. Sinusoidal input current can be achieved under nonsinusoidal input voltage condition. The switching frequency of FPGA control boost PFC is 400 kHz. The proposed duty cycle parallel control strategy has high potential for the next generation of high switching frequency PFC implementation, due to its lower calculation requirement, lower cost and better performance than average current mode control
  • Keywords
    AC-DC power convertors; application specific integrated circuits; cost reduction; digital signal processing chips; electric current control; field programmable gate arrays; microcomputers; power factor correction; switching convertors; voltage control; 400 kHz; AC-DC converters; ASIC; DSP; FPGA; PFC; application-specific integrated circuit; boost PFC; cost reduction; current mode control; current regulation; digital implementation; digital signal processor; duty cycle parallel control method; field programmable gate array; microprocessor; power factor correction; reference current; sensed inductor current; switching frequency; unity power factor; voltage regulation; AC-DC power converters; Costs; Digital signal processing; Field programmable gate arrays; Inductors; Microprocessors; Power factor correction; Reactive power; Switching frequency; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition, 2005. APEC 2005. Twentieth Annual IEEE
  • Conference_Location
    Austin, TX
  • Print_ISBN
    0-7803-8975-1
  • Type

    conf

  • DOI
    10.1109/APEC.2005.1453072
  • Filename
    1453072