A 10 Gb/s SONET-compliant CMOS transceiver with low cross-talk and intrinsic jitter

Author

Werker, H. ; Mechnig, S. ; Holuigue, C. ; Ebner, C. ; Mitteregger, G. ; Romani, E. ; Roger, F. ; Blon, T. ; Moyal, M. ; Melodia, A. ; Fisher, Jonathan ; Mercey, Gregoire ; Geib, H.

Author_Institution

Xignal Technol. AG., Munich, Germany

fYear

2004

fDate

15-19 Feb. 2004

Firstpage

172

Abstract

A single-chip full-rate transceiver in 0.13 μm standard CMOS consumes less than 1 W. By using a special power-supply concept and a notched high-Q inductor in the VCO, the IC achieves a 0.2 ps rms jitter. A limiting amplifier with a sensitivity of 20 mV at 7 GHz BW enables the CDR to recover data with a BER of <10^-12.

Keywords

CMOS integrated circuits; MMIC amplifiers; SONET; crosstalk; error statistics; integrated circuit measurement; jitter; microwave limiters; optical receivers; optical transmitters; power supply circuits; sensitivity; transceivers; voltage-controlled oscillators; 0.13 micron; 0.2 ps; 10 Gbit/s; 20 mV; 7 GHz; CDR data recovery BER; SONET-compliant CMOS transceiver; VCO; amplifier BW; cross-talk; intrinsic jitter; limiting amplifier sensitivity; notched high-Q inductor; rms jitter; single-chip full-rate transceiver; special power-supply concept; Bandwidth; CMOS technology; Impedance; Inductors; Jitter; Phase locked loops; Phase noise; SONET; Transceivers; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International

ISSN

0193-6530

Print_ISBN

0-7803-8267-6

Type

conf

DOI

10.1109/ISSCC.2004.1332649

Filename

1332649