ASIC design for computing the Mallat´s wavelet transform

Author

Artigas, José I. ; Barragán, Luis A. ; Laloya, Eduardo ; Moreno, Juan C. ; Navarro, Denis

Author_Institution

Zaragoza Univ., Spain

fYear

1995

fDate

18-22 Sep 1995

Firstpage

67

Lastpage

70

Abstract

Wavelet transforms have become a very powerful tool in computer vision. They are computationally very intensive and real-time processing cannot be achieved with software implementations on a conventional von-Neumann programmable computer. We have followed a top-down design methodology to synthesize an ASIC using VHDL. Behavioral and gate level netlist have been validated to assure that enough computational power is provided to satisfy video real-time demands

Keywords

VLSI; application specific integrated circuits; computer vision; edge detection; hardware description languages; integrated circuit design; wavelet transforms; ASIC design; Mallat´s wavelet transform; VHDL; behavioral netlist; computer vision; gate level netlist; top-down design methodology; video real-time demands; Algorithm design and analysis; Application specific integrated circuits; Computational complexity; Computer vision; Discrete wavelet transforms; Hardware; Image edge detection; Low pass filters; Very large scale integration; Wavelet transforms;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International

Conference_Location

Austin, TX

ISSN

1063-0988

Print_ISBN

0-7803-2707-1

Type

conf

DOI

10.1109/ASIC.1995.580683

Filename

580683