Compiled-code VHDL approximate fault simulation

Switch-level faults, as opposed to traditional gate-level faults, can more accurately model physical failures found in an integrated circuit. However, one problem with switch-level fault simulation is that of long simulation times. This paper addresses this problem by performing fast approximate switch-level fault simulation using transistor reverse level ordering, and a novel 9-valued switch-level extension to observability. The probability of propagation of a fault from an arbitrary line of the switch-level circuit to the primary output is shown to be a function of the average node fan-in and the line´s distance to primary output. Using this probability, results show one order of magnitude of complexity speed-up as compared to traditional fault simulation techniques, while maintaining good accuracy