Title :
Under 0.5W 50Gb/s full-rate 4:1MUX and 1:4 DEMUX in 0.13μm InP HEMT technology
Author :
Suzuki, Takumi ; Takahashi, Tatsuro ; Makiyarna, K. ; Sawada, Kazuaki ; Nakasha, Yasuhiro ; Hirose, Tatsuya ; Takikawa, Michio
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
Abstract :
50Gb/s full-rate 4:1 MUX and 1:4 DEMUX ICs are fabricated in an InP HEMT technology. The MUX has an rms jitter of 283fs and a peak-to-peak jitter of 1.78ps. The DEMUX has a phase margin of 250° and a sensitivity of 80mV at 40Gb/s. The MUX and DEMUX consume 450mW and 490mW from a -1.5V supply, respectively.
Keywords :
HEMT integrated circuits; III-V semiconductors; demultiplexing equipment; high-speed integrated circuits; indium compounds; low-power electronics; multiplexing equipment; timing jitter; 450 mW; 490 mW; 50 Gbit/s; HEMT technology; InP; RMS jitter; demultiplexer; eye opening; multi-phase clock architecture; multiplexer; peak-to-peak jitter; timing margin; total power consumption; Circuits; Clocks; Energy consumption; HEMTs; Indium phosphide; Jitter; Latches; Timing; Voltage; Wavelength division multiplexing;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332680
