Title :
A 6b 600MHz 10mW ADC array in digital 90nm CMOS
Author_Institution :
Infineon Design Centers, Villach, Austria
Abstract :
A 6b converter array operates at a 600MHz clock frequency with input signals up to 600MHz and only 10mW power consumption. The array consists of 8 interleaved successive approximation converters implemented in a 90nm digital CMOS technology.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; high-speed integrated circuits; low-power electronics; 10 mW; 600 MHz; 90 nm; ADC array; clock buffer; differential-to-single-ended conversion; digital CMOS; high speed ADC; high throughput; interleaved successive approximation converters; low jitter operation; low power consumption; parallel architecture; Capacitors; Clocks; Data acquisition; Energy consumption; Low voltage; Operational amplifiers; Read-write memory; Sampling methods; Switches; Throughput;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332695
