Title :
A 180mV FFT processor using subthreshold circuit techniques
Author :
Wang, Aiping ; Chandrakasan, Anantha
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
Minimizing energy requires scaling supply voltages below device thresholds. Logic and memory design techniques allowing subthreshold operation are developed and demonstrated. The fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18μm CMOS logic process while using 155nJ/FFT at the optimal operating point.
Keywords :
CMOS logic circuits; digital signal processing chips; fast Fourier transforms; low-power electronics; 180 mV; CMOS logic process; FFT processor; custom real-valued processor; logic design techniques; low-voltage FFT; memory design techniques; optimal operating point; programmable FFT; scaling below device threshold; subthreshold circuit techniques; supply voltage scaling; CMOS logic circuits; Clocks; Degradation; Energy dissipation; Frequency; Inverters; Logic circuits; Logic devices; Read-write memory; Threshold voltage;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332709
